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CXD2724AQ-3 Datasheet(PDF) 61 Page - Sony Corporation |
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CXD2724AQ-3 Datasheet(HTML) 61 Page - Sony Corporation |
61 / 65 page – 61 – CXD2724AQ-3 8-6. Bypass Mode In this mode, the DSP is bypassed. The ADC and DAC are not used and both the L and R channels are in analog-to-analog through status. (1) Setting Bypass Mode Set the uppermost bit (SQA15) of setup register Field A to "1". The other setup data and coefficient data is "Don't care". MUX & LPF LPF LIN LOUT MUX & LPF LPF RIN ROUT Fig. 8-6-1. Bypass Mode In bypass mode, the output after ADC prefilter and the output after DAC postfilter are swtiched by the analog switch. The popping noise occurs at switching due to the difference of these filter's reference voltages (500mV). Therefore, the countermeasure against the noise, such as the system muting, is required when using this mode. |
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