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CXD2724AQ-3 Datasheet(PDF) 25 Page - Sony Corporation |
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CXD2724AQ-3 Datasheet(HTML) 25 Page - Sony Corporation |
25 / 65 page ![]() – 25 – CXD2724AQ-3 Data section bit SQD15 to SQD03 SQD02 to SQD00 Control contents Reserve bit Be sure to set all of these bits Low when changing the setup register Field D settings. Coefficient memory SQD02 01 00 type setting 0 0 0 ROM only (ROM = 00 to ffH) 0 0 1 ROM/RAM mixed (ROM = 00 to dfH/RAM = E0 to ffH) 0 1 0 ROM/RAM mixed (ROM = 00 to bfH/RAM = C0 to ffH) 0 1 1 ROM/RAM mixed (ROM = 00 to 9fH/RAM = A0 to ffH) 1 0 0 ROM/RAM mixed (ROM = 00 to 7fH/RAM = 80 to ffH) 1 0 1 ROM/RAM mixed (ROM = 00 to 3fH/RAM = 40 to ffH) 1 1 0 ROM/RAM mixed (ROM = 00 to 1fH/RAM = 20 to ffH) 1 1 1 RAM only (RAM = 00 to ffH) all "L" ROM only (4) Field D Table 6-4. Setup Register Field D When reset |
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Similar Description - CXD2724AQ-3 |
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