cxd2720q-2 datasheet(20/47 Pages) SONY

Part #	CXD2720Q-2

Description	Single-Chip Dolby Pro Logic Surround Decoder

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CXD2720Q-2

(3) Data Structure

Data structure is classified in three types, as shown in the table below. All data communication is done with

LSB first.

Name

A0 to A7

M0 to M7

D0 to D15/SQ00 to SQ23

8

16/24

Address section

Transmission

mode section

Data section

Coefficient RAM is 16 bits; setup register is

24 bits

Bit length

Contents

Remarks

(3)-1. Transmission Mode Section

The transmission mode section is 8 bits and has the following functions.

Bit

M7

M6

M5

M4

M3

M2

M1

M0

0: ON (No sound)

1: OFF

VS1

VS0

0

Setup register

1

0

Coefficient RAM (K-RAM)

0: Receive

1: Send

XVMT

VS1

VS0

VRD

SO Mute

Reserve

Data type

Reserve

Send/Receive

Name

Function

(3)-2. Address Section

The coefficient RAM has a 192-word structure, so the address section is 8 bits. The setup register has a 1-

word structure, so the address section data may be optional.

(3)-3. Data Section

Sixteen SCK are required, as the coefficient RAM has a 16-bit structure (D0 to D15). The setup register has a

24-bit structure (SQ00 to SQ23), so twenty-four SCK are required.

Table 6-2. Data Structure

Table 6-3. Transmission Mode Section

Note) Polarity as seen from the CXD2720Q-2

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CXD2720Q-2 Datasheet(PDF) 20 Page - Sony Corporation

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