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CXD2720Q-2 Datasheet(PDF) 25 Page - Sony Corporation

Part # CXD2720Q-2
Description  Single-Chip Dolby Pro Logic Surround Decoder
Download  47 Pages
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Manufacturer  SONY [Sony Corporation]
Direct Link  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD2720Q-2 Datasheet(HTML) 25 Page - Sony Corporation

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CXD2720Q-2
7. Setup Register
When the setup register is selected for microcomputer interface transmission mode, the following settings are
possible for serial audio interface and DAC.
Data
section bit
Control
When system reset is Low
SQ23 to 12
SQ11
SQ10
SQ09
SQ08
SQ07
SQ06, 05
SQ04
SQ03
SQ02, 01
SQ00
Reserve bit
LRCK format
LRCK polarity selection
BCK polarity selection
relative to LRCK edge
SI data list
SI frontward/rearward
truncation
SI data word length
SO data list
SO frontward/rearward
truncation
SO data word length
DAC forced mute
Must be Low for setup register setting
change
0: normal
1: IIS
0: Lch High
1: Lch Low
0: Falling edge
1: Rising edge
0: MSB first
1: LSB first
(24-bit rearward truncation)
0: Frontward truncation
(valid only for MSB first/24 bits/32 slots)
1: Rearward truncation
SQ06
SQ05
0
0
: 16 bits
1
1
: 24 bits
0: MSB first
1: LSB first
0: Frontward truncation
1: Rearward truncation
SQ02
SQ01
0
0
: 16 bits
0
1
: 18 bits
1
0
: 20 bits
1
1
: 24 bits
0: ON
1: OFF
All Low
Normal
Lch High
Falling edge
MSB first
Frontward truncation
16 bits
LSB first
Frontward truncation
16 bits
ON
Table 7-1.


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