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CXD2586R Datasheet(PDF) 7 Page - Sony Corporation |
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CXD2586R Datasheet(HTML) 7 Page - Sony Corporation |
7 / 127 page – 7 – CXD2586R/-1 ∗ In the 144-pin LQFP, the following pins are NC: Pins 17, 30, 44, 61, 90, 100, 109, and 133 Notes) • The 64-bit slot is an LSB first, two's complement output. The 48-bit slot is an MSB first, two's complement output. • GTOP is used to monitor the frame sync protection status. (High: sync protection window released.) • XUGF is the negative pulse for the frame sync obtained from the EFM signal. It is the signal before sync protection. • XPLCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the EFM signal transition point coincide. • The GFS signal goes high when the frame sync and the insertion protection timing match. • RFCK is derived from the crystal accuracy, and has a cycle of 136µs. • C2PO represents the data error status. • XRAOF is generated when the 32K RAM exceeds the ±28F jitter margin. 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 134 135 136 137 138 139 140 141 142 143 144 O O O O O O O O O O O I I I I O I O I O I I I I 1, 0 1, 0 1, 0 1, 0 1, 0 1, 0 1, 0 1, 0 1, 0 1, 0 1, 0 1, Z, 0 1, 0 Sled drive output. Sled drive output. Tracking drive output. Tracking drive output. Tracking drive output. Tracking drive output. Focus drive output. Focus drive output. Focus drive output. Focus drive output. Digital power supply. Analog EFM PLL oscillation circuit output. Analog EFM PLL oscillation circuit input. flock = 8.6436MHz. Test pin. Normally fixed to low. Digital GND. Test pin. Normally fixed to low. Test pin. Normally fixed to low. Analog EFM PLL charge pump output. Variable pitch clock input from the external VCO. fcenter = 16.9344MHz. Wide-band EFM PLL VCO2 oscillation output. Analog power supply. Operational amplifier current source reference resistance connection. Analog GND. Operational amplifier output. RF signal LPF time constant capacitor connection. RF signal input. Center servo analog input. Tracking error signal input. SRDR SFON TFDR TRON TRDR TFON FFDR FRON FRDR FFON DVDD3 VCOO VCOI TEST DVSS3 TES2 TES3 PDO VCKI V16M AVDD2 IGEN AVSS2 ADIO RFC RFDC CE TE Pin No. Symbol I/O Description |
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