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TPS54292 Datasheet(PDF) 4 Page - Texas Instruments |
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TPS54292 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 35 page TPS54290, TPS54291, TPS54292 SLUS973 – OCTOBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) TJ = –40°C to 125°C, PVDD1 and 2 = 12V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BOOTSTRAP (Applied to both channels) RBOOT Bootstrap switch resistance R(BP to BOOT), I external = 10 mA 33 Ω PGOOD VUV Feedback voltage limit for PGOOD 660 730 mV VPG-HYST (3) PGOOD hysteresis voltage on FB 40 mV OUTPUT STAGE (Applied to both channels) On resistance of high-side FET RDS(on1)(HS) (3) 170 265 m Ω and bondwire on CH1 On resistance of high-side FET RDS(on2)(HS) (3) 120 190 m Ω and bondwire on CH2 On resistance of low-side FET and m Ω RDS(on1)(LS) (3) 120 190 bondwire on CH1 On resistance of low-side FET and RDS(on2)(LS) (3) 90 150 m Ω bondwire on CH2 tON_MIN (3) Miimum controllable pulse width 150 ns Minimum duty VFB = 0.9 V 0% cycle HDRV off to LDRV on 20 ns tDEAD (3) Output driver dead time LDRV off to HDRV on 20 ns TPS54290 90% 96% DMAX Maximum duty cycle TPS54291 85% 91% TPS54292 78% 82% THERMAL SHUTDOWN TSD (3) Shutdown temperature 145 °C TSD_HYS (3) Hysteresis 20 °C (3) Specified by design. Not tested in production. 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TPS54290 TPS54291 TPS54292 |
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