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IA186EB Datasheet(PDF) 81 Page - InnovASIC, Inc |
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IA186EB Datasheet(HTML) 81 Page - InnovASIC, Inc |
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81 / 85 page  IA186EB/IA188EB Data Sheet 8-Bit/16-Bit Microcontrollers July 10, 2011 IA211080314-13 http://www.Innovasic.com UNCONTROLLED WHEN PRINTED OR COPIED Customer Support: Page 81 of 85 1-888-824-4184 Errata No. 8 Problem: Pin LOCK_n does not have an internal pullup. Description: Because Pin LOCK_n does not have an internal pullup, it will float during reset and bus hold. Workaround: An external pullup may be necessary if there is high external load on the signal. Errata No. 9 Problem: The Relocation Register (RELREG, PCB offset 0xA8) can only be modified by an 8-bit write. Description: The Relocation Register (RELREG, PCB offset 0xA8) can only be modified by an 8-bit write. A 16-bit write will have no effect. The 186 EB is unaffected. Workaround: Use an 8-bit access to affect the RELREG register. Errata No. 10 Problem: When the timer compare register for any of the timers is set to x0000, the max count is xFFFF instead of x10000 as in the OEM part. Description: The timer output will change one count earlier than it should when the max count is set to x0000. Workaround: The workaround is application dependent. Please contact Innovasic Technical Support if this erratum is an issue. Errata No. 11 Problem: NMI cannot bring chip out of powerdown mode. Description: Only a reset brings the part out of powerdown after a HLT instruction is executed with the PWRDN bit set in the PWRCON register. Workaround: Use IDLE instead of PWRDN. |
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