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CXA1372BS Datasheet(PDF) 17 Page - Sony Corporation |
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CXA1372BS Datasheet(HTML) 17 Page - Sony Corporation |
17 / 32 page – 17 – CXA1372BQ/BS Mirror Circuit The mirror circuit performs peak and bottom hold after the RFI signal has been amplified. For the peak hold, a time constant can follow a 30kHz traverse, and, for the bottom hold, one can follow the rotation cycle envelope fluctuation. Through differential amplification of the peak and bottom hold signals H and I, mirror output can be obtained by comparing an envelope signal J (demodulated to DC) to signal K for Which peak holding at a level 2/3 that of the maximum was performed with a large time constant. In other words, mirror output is low for tracks on the disc and high for the area between tracks (the MIRR areas). In addition, a high signal is output when a defect is detected. The mirror hold time constant must be sufficiently large in comparison with the traverse signal. 20k 0.033µ RFO RFI CP MIRROR COMPARATOR PEAK & BOTTOM HOLD × 2.2 K MIRROR HOLD AMP J H I × 1 G MIRROR AMP MIRR DGND 29 38 39 RFO H L 0V 0V 0V 0V G (RFI) H (PEAK HOLD) I (BOTTOM HOLD) (MIRROR HOLD) J K MIRR |
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