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TPS650250QRHBRQ1 Datasheet(PDF) 8 Page - Texas Instruments |
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TPS650250QRHBRQ1 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 32 page  TPS650250-Q1 SLVSAA7 – MARCH 2010 www.ti.com ELECTRICAL CHARACTERISTICS VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 3.6V, TJ = –40°C to 125°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDCDC3 STEP-DOWN CONVERTER VI Input voltage range, VINDCDC3 2.5 6.0 V IO Maximum output current VO = 1.6V 800 mA Shutdown supply current in ISD EN_DCDC3 = GND 0.1 1 mA VINDCDC3 RDS(on) P-channel MOSFET on-resistance VINDCDC3 = VGS = 3.6V 310 698 m Ω ILP P-channel leakage current VINDCDC3 = 6V 0.1 2 mA RDS(on) N-channel MOSFET on-resistance VINDCDC3 = VGS = 3.6V 220 503 m Ω ILN N-channel leakage current VDS = 6.0V 7 10 mA Forward current limit (P- and ILIMF 2.5V < VINDCDC3 < 6V 1.00 1.20 1.40 A N-channel) fS Oscillator frequency 1.95 2.25 2.55 MHz Adjustable output voltage with VINDCDC3 = VDCDC3 + 0.5V (min 2.5V) to 6V; resistor divider at DEFDCDC2 0mA ≤ IO ≤ 0.8A –2% 2% MODE = 0 (PWM) VDCDC3 Adjustable output voltage with VINDCDC3 = VDCDC3 + 0.5V (min 2.5V) to 6V; resistor divider at DEFDCDC2; 0mA ≤ IO ≤ 0.8A –1% 1% MODE = 1 (PWM) VINDCDC3 = VDCDC3 + 0.3V (min. 2.5 V) to Line regulation 0.0 %/V 6V; IO = 10mA Load regulation IO = 10mA to 600mA 0.25 %/A VDCDC3 ramping from 5% to 95% of target tSS Soft start ramp time 750 ms value R(L3) Internal resistance from L3 to GND 1 M Ω 8 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPS650250-Q1 |
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