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ISO7221C-Q1 Datasheet(PDF) 5 Page - Texas Instruments |
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ISO7221C-Q1 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 24 page ISO7220A-Q1 ISO7221A-Q1 ISO7221C-Q1 www.ti.com SLLS965C – JULY 2009 – REVISED MAY 2012 ELECTRICAL CHARACTERISTICS VCC1 = 5 V, VCC2 = 3.3 V (1), over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ISO7220x 1 2 Quiescent VI = VCC or 0 V, no load ISO7221x 8.5 17 ICC1 Supply current, VCC1 ISO7220A 2 3 mA 1 Mbps VI = VCC or 0 V, no load ISO7221A 10 18 ISO7221C 25 Mbps VI = VCC or 0 V, no load 12 22 ISO7220x 8 18 Quiescent VI = VCC or 0 V, no load ISO7221x 4.3 9.5 ICC2 Supply current, VCC2 ISO7220A 9 19 mA 1 Mbps VI = VCC or 0 V, no load ISO7221A 5 11 ISO7221C 25 Mbps VI = VCC or 0 V, no load 6 12 ISO7220x VCC – 0.4 IOH = –4 mA, See Figure 1 ISO7221x VOH High-level output voltage VCC – 0.8 V (5-V side) IOH = –20 μA, See Figure 1 VCC – 0.1 IOL = 4 mA, See Figure 1 0.4 VOL Low-level output voltage V IOL = 20 μA, See Figure 1 0.1 VI(HYS) Input voltage hysteresis 150 mV IIH High-level input current IN from 0 V to VCC 10 μA IIL Low-level input current IN from 0 V to VCC –10 μA CI Input capacitance to ground IN at VCC, VI = 0.4 sin (4E6πt) 1 pF CMTI Common-mode transient immunity VI = VCC or 0 V, See Figure 3 15 40 kV/ μs (1) For the 5-V operation, VCC1 or VCC2 is specified from 4.5 V to 5.5 V. For the 3-V operation, VCC1 or VCC2 is specified from 3 V to 3.6 V. SWITCHING CHARACTERISTICS VCC1 = 5 V, VCC2 = 3.3 V, over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tpLH, tpHL Propagation delay 285 410 480 ns ISO722xA See Figure 1 PWD Pulse-width distortion |tpHL – tpLH| (1) 1 14 ns tpLH, tpHL Propagation delay 25 36 48 ns ISO722xC See Figure 1 PWD Pulse-width distortion |tpHL – tpLH| (1) 1 2 ns ISO722xA 180 tsk(pp) Part-to-part skew (2) ns ISO722xC 10 ISO722xA 3 15 tsk(o) Channel-to-channel output skew (3) ns ISO722xC 0.2 1 tr Output signal rise time See Figure 1 2 ns tf Output signal fall time See Figure 1 2 tfs Failsafe output delay time from input power loss See Figure 2 3 μs (1) Also referred to as pulse skew. (2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) tsk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads. Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): ISO7220A-Q1 ISO7221A-Q1 ISO7221C-Q1 |
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