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CDCLVP1216 Datasheet(PDF) 1 Page - Texas Instruments |
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CDCLVP1216 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 22 page LVPECL 16 16 Reference Generator GND GND OUTP[15...0] OUTN[15...0] V CC V AC_REF V CC V CC V CC V CC V CC INP0 INN0 INP1 INN1 IN_SEL CDCLVP1216 www.ti.com SCAS877C – MAY 2009 – REVISED AUGUST 2011 16 LVPECL Output, High-Performance Clock Buffer Check for Samples: CDCLVP1216 1 FEATURES DESCRIPTION The CDCLVP1216 is a highly versatile, low additive 2 • 2:16 Differential Buffer jitter buffer that can generate 16 copies of LVPECL • Selectable Clock Inputs Through Control Pin clock outputs from one of two selectable LVPECL, • Universal Inputs Accept LVPECL, LVDS, and LVDS, or LVCMOS inputs for a variety of LVCMOS/LVTTL communication applications. It has a maximum clock frequency up to 2 GHz. The CDCLVP1216 features • 16 LVPECL Outputs an on-chip multiplexer (MUX) for selecting one of two • Maximum Clock Frequency: 2 GHz inputs that can be easily configured solely through a • Maximum Core Current Consumption: 110 mA control pin. The overall additive jitter performance is less than 0.1 ps, RMS from 10 kHz to 20 MHz, and • Very Low Additive Jitter: <100 fs,rms in 10-kHz overall output skew is as low as 30 ps, making the to 20-MHz Offset Range device a perfect choice for use in demanding • 2.375 V to 3.6 V Device Power Supply applications. • Maximum Propagation Delay: 550 ps The CDCLVP1216 clock buffer distributes one of two • Maximum Output Skew: 30 ps selectable clock inputs (IN0, IN1) to 16 pairs of • LVPECL Reference Voltage, VAC_REF, Available differential LVPECL clock outputs (OUT0, OUT15) with minimum skew for clock distribution. The for Capacitive-Coupled Inputs CDCLVP1216 can accept two clock sources into an • Industrial Temperature Range: –40°C to +85°C input multiplexer. The inputs can be LVPECL, LVDS, • ESD Protection Exceeds 2 kV (HBM) or LVCMOS/LVTTL. • Available in 7-mm × 7-mm QFN-48 (RGZ) The CDCLVP1216 is specifically designed for driving Package 50- Ω transmission lines. When driving the inputs in single-ended mode, the LVPECL bias voltage APPLICATIONS (VAC_REF) should be applied to the unused negative input pin. However, for high-speed performance up to • Wireless Communications 2 GHz, differential mode is strongly recommended. • Telecommunications/Networking The CDCLVP1216 is packaged in a small 48-pin, • Medical Imaging 7-mm x 7-mm QFN package and is characterized for • Test and Measurement Equipment operation from –40°C to +85°C. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2009–2011, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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