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CDC2351-EP Datasheet(PDF) 1 Page - Texas Instruments |
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CDC2351-EP Datasheet(HTML) 1 Page - Texas Instruments |
1 / 10 page CDC2351EP 1LINE TO 10LINE CLOCK DRIVER WITH 3STATE OUTPUTS SGLS248A − JUNE 2004 − REVISED AUGUST 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of −55 °C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications D Operates at 3.3-V VCC D LVTTL-Compatible Inputs and Outputs D Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) D Distributes One Clock Input to 10 Outputs † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. D Outputs Have Internal Series Damping Resistor to Reduce Transmission Line Effects D Distributed VCC and Ground Pins Reduce Switching Noise D State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation D Shrink Small-Outline (DB) Package description The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to 10 outputs (Y) with minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351 operates at nominal 3.3-V VCC. The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND. The CDC2351M is characterized for operation over the full military temperature range of −55 °C to 125°C. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING −55 °C to 125°C SSOP − DB Tape and Reel CDC2351MDBREP CK2351MEP † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2004, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC- ΙΙΒ is a trademark of Texas Instruments. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND Y10 VCC Y9 OE A P0 P1 Y8 VCC Y7 GND GND Y1 VCC Y2 GND Y3 Y4 GND Y5 VCC Y6 GND DB PACKAGE (TOP VIEW) |
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