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CY7C1347G Datasheet(PDF) 2 Page - Cypress Semiconductor

Part # CY7C1347G
Description  4-Mbit (128 K 횞 36) Pipelined Sync SRAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1347G Datasheet(HTML) 2 Page - Cypress Semiconductor

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CY7C1347G
Document Number: 38-05516 Rev. *L
Page 2 of 25
ADDRESS
REGISTER
ADV
CLK
BURST
COUNTER
AND
LOGIC
CLR
Q1
Q0
ADSP
ADSC
MODE
BWE
GW
CE1
CE2
CE3
OE
ENABLE
REGISTER
OUTPUT
REGISTERS
SENSE
AMPS
OUTPUT
BUFFERS
E
PIPELINED
ENABLE
INPUT
REGISTERS
A0, A1, A
BW B
BW C
BW D
BW A
MEMORY
ARRAY
DQs
DQP A
DQP B
DQP C
DQP D
SLEEP
CONTROL
ZZ
A[1:0]
2
DQA ,DQP A
BYTE
WRITE REGISTER
DQB ,DQP B
BYTE
WRITE REGISTER
DQC ,DQP C
BYTE
WRITE REGISTER
DQD ,DQP D
BYTE
WRITE REGISTER
DQA ,DQP A
BYTE
WRITE DRIVER
DQB ,DQP B
BYTE
WRITE DRIVER
DQC ,DQP C
BYTE
WRITE DRIVER
DQD ,DQPD
BYTE
WRITE DRIVER
Logic Block Diagram


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