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TPA3118D2DAPR Datasheet(PDF) 3 Page - Texas Instruments |
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TPA3118D2DAPR Datasheet(HTML) 3 Page - Texas Instruments |
3 / 34 page TPA3116D2 TPA3118D2 TPA3130D2 www.ti.com SLOS708B – APRIL 2012 – REVISED MAY 2012 Terminal Functions (continued) PIN TYPE(1) DESCRIPTION NO. NAME 15 AM0 I AM Avoidance Frequency Selection 16 SYNC DIO Clock input/output for synchronizing multiple class-D devices. Direction determined by GAIN/SLV terminal. 17 AVCC P Analog Supply 18 PVCC P Power supply 19 PVCC P Power supply 20 BSNL BST Boot strap for negative left channel output, connect to 220 nF X5R, or better ceramic cap to OUTPL 21 OUTNL PO Negative left channel output 22 GND G Ground 23 OUTPL PO Positive left channel output 24 BSPL BST Boot strap for positive left channel output, connect to 220 nF X5R, or better ceramic cap to OUTNL 25 GND G Ground 26 BSNR BST Boot strap for negative right channel output, connect to 220 nF X5R, or better ceramic cap to OUTNR 27 OUTNR PO Negative right channel output 28 GND G Ground 29 OUTPR PO Positive right channel output 30 BSPR BST Boot strap for positive right channel output, connect to 220 nF X5R or better ceramic cap to OUTPR 31 PVCC P Power supply 32 PVCC P Power supply 33 Thermal Pad G Connect to GND for best system performance. If not connected to GND, leave floating. or PowerPAD Copyright © 2012, Texas Instruments Incorporated 3 |
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