INA3221

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SBOS576 – MAY 2012

Critical Alert Channel 1 Limit Register (Address = 07h, Read/Write)

BIT

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

NAME

C1L12

C1L11

C1L10

C1L9

C1L8

C1L7

C1L6

C1L5

C1L4

C1L3

C1L2

C1L1

C1L0

—

—

—

POR

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

VALUE

This register contains the value used to compare to each shunt voltage conversion on channel 1 to detect fast

overcurrent events.

Warning Alert Channel 1 Limit Register (Address = 08h, Read/Write)

BIT

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

NAME

W1L12

W1L11

W1L10

W1L9

W1L8

W1L7

W1L6

W1L5

W1L4

W1L3

W1L2

W1L1

W1L0

—

—

—

POR

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

VALUE

This register contains the value used to compare to the averaged shunt voltage value of channel 1 to detect a

longer duration overcurrent event.

Critical Alert Channel 2 Limit Register (Address = 09h, Read/Write)

BIT

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

NAME

C2L12

C2L11

C2L10

C2L9

C2L8

C2L7

C2L6

C2L5

C2L4

C2L3

C2L2

C2L1

C2L0

—

—

—

POR

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

VALUE

This register contains the value used to compare to each shunt voltage conversion on channel 2 to detect fast

overcurrent events.

Warning Alert Channel 2 Limit Register (Address = 0Ah, Read/Write)

BIT

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

NAME

W2L12

W2L11

W2L10

W2L9

W2L8

W2L7

W2L6

W2L5

W2L4

W2L3

W2L2

W2L1

W2L0

—

—

—

POR

0

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

VALUE

This register contains the value used to compare to the averaged shunt voltage value of channel 2 to detect a

longer duration overcurrent event.

Copyright © 2012, Texas Instruments Incorporated

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