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INA3221AIRGV Datasheet(PDF) 22 Page - Texas Instruments

Part # INA3221AIRGV
Description  Triple-Channel, High-Side Measurement, Shunt and Bus Voltage Monitor
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

INA3221AIRGV Datasheet(HTML) 22 Page - Texas Instruments

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INA3221
SBOS576 – MAY 2012
www.ti.com
Bits[5:3]
VSH CT: Shunt voltage conversion time
Sets the conversion time for the shunt voltage measurement.
Table 5 shows the VSH CT bit options and related conversion times for each bit.
Table 5. VSH CT Bit Settings, Bits[5:3]
VSH CT2
VSH CT1
VSH CT0
CONVERSION TIME
D5
D4
D3
0
0
0
140 µs
0
0
1
204 µs
0
1
0
332 µs
0
1
1
588 µs
1 (default)
0 (default)
0 (default)
1.1 ms (default)
1
0
1
2.116 ms
1
1
0
4.156 ms
1
1
1
8.244 ms
Bits[2:0]
MODE: Operating mode
Selects continuous, triggered, or power-down mode of operation. These bits default to continuous shunt and bus
measurement mode.
The mode settings are shown in Table 6.
Table 6. Mode Settings, Bits[2:0]
MODE3
MODE2
MODE1
MODE
D2
D1
D0
0
0
0
Power-down
0
0
1
Shunt voltage, triggered
0
1
0
Bus voltage, triggered
0
1
1
Shunt and bus, triggered
1
0
0
Power-down
Shunt voltage,
1
0
1
continuous
1
1
0
Bus voltage, continuous
Shunt and bus,
1 (default)
1 (default)
1 (default)
continuous (default)
The Configuration Register settings control the operating modes for the shunt and bus voltage measurements for
the three input channels. This register controls the conversion time settings for both the shunt and bus voltage
measurements and the averaging mode used. The Configuration Register can be used to independently enable
or disable each channel as well as select the operating mode that controls which signals are selected to be
measured.
This register can be read from at any time without impacting or affecting either device settings or conversions in
progress. Writing to this register halts any conversion in progress until the write sequence is completed, resulting
in a new conversion starting based on the new Configuration Register contents. This architecture prevents any
uncertainty in the conditions used for the next completed conversion.
22
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Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): INA3221


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