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CDCM6208V1RGZT Datasheet(PDF) 18 Page - Texas Instruments |
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CDCM6208V1RGZT Datasheet(HTML) 18 Page - Texas Instruments |
18 / 78 page CDCM6208 SCAS931A – MAY 2012 – REVISED JUNE 2012 www.ti.com WORST CASE CURRENT CONSUMPTION VDD_Yx_Yy, VDD_PRI, VDD_SEC, VDD_PLLx, DVDD, VDD_VCO = 3.45 V, TA = T-40 °C to 85 °C, Output Types = maximum swing, all blocks including duty cycle correction and fractional divider enabled and operating at maximum operation Block Condition Current Consumption typ / Max All conditions over PVT, AC coupled outputs with all outputs terminated, device configuration: Device Settings (V2) 1. PRI input enabled, set to LVDS mode 2. SEC input XTAL 3. Input bypass off, PRI only sent to PLL 4. Reference clock 30.72 MHz 5. PRI input divider set to 1 6. Reference input divider set to 1 7. Charge Pump Current = 2.5 mA 1.8 V: 310 mA / +21% (excl term) Total Device, CDCM6208 8. VCO Frequency = 3.072 GHz 3.3 V: 318 mA / +21% (excl term) 9. PS_A = PS_B divider ration = 4 10. Feedback divider ratio = 25 11. Output divider ratio = 5 12. Fractional divider pre-divider = 2 13. Fractional divider core input frequency = 384 MHz 14. Fractional divider value = 3.84, 5.76, 3.072, 7.68 15. CML outputs selected for CH0-3 (153.6 MHz) LVDS outputs selected for CH4-7 (100MHz, 66.66 MHz, 125 MHz, 50 MHz) 18 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): CDCM6208 |
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