CDCM6208V1RGZT datasheet(11/78 Pages) TI

Part #	CDCM6208V1RGZT

Description	2:8 CLOCK GENERATOR, JITTER CLEANER WITH FRACTIONAL DIVIDERS

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Manufacturer	TI [Texas Instruments]

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CDCM6208

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SCAS931A – MAY 2012 – REVISED JUNE 2012

CRYSTAL INPUT CHARACTERISTICS (SEC_REF)

VDD_SEC = 1.71 TO 1.89 V, 2.375 V TO 2.625 V, 3.135 V TO 3.465 V,TA = -40°C TO 85°C

PARAMETER

MINI

TYP

MAX

UNITS

Mode of Oscillation

Fundamental

See note (1)

10

30.72

MHz

Frequency

See note (2)

30.73

50

MHz

10 MHz

150(3)

Equivalent Series Resistance (ESR)

25 MHz

70(4)

Ω

50 MHz

30(5)

1.8 V / 3.3 V SEC_REFP

3.5

4.5

5.5

On-chip load capacitance

1.8 V SEC_REFN

5.5

7.25

8.5

pF

3.3 V SEC_REFN

6.5

7.34

8.5

Drive Level

See note (6)

200

µW

(1)

Verified with crystals specified for a load capacitance of CL=8pF, the pcb related capacitive load was estimated to be 2.3pF, and

completed with a load capacitors of 4pF on each crystal terminal connected to GND. XTALs tested: NX3225GA 10MHz EXS00A-

CG02813 CRG, NX3225GA 19.44MHz EXS00A-CG02810 CRG, NX3225GA 25MHz EXS00A-CG02811 CRG, and NX3225GA

30.72MHz EXS00A-CG02812 CRG.

(2)

For 30.73 MHz to 50 MHz, it is recommended to verify sufficient negative resistance and initial frequency accuracy with the crystal

vendor. The 50 MHz use case was verified with a NX3225GA 50MHz EXS00A-CG02814 CRG. To meet a minimum frequency error, the

best choice of the XTAL was one with CL = 7pF instead of CL = 8pF.

(3)

With NX3225GA_10M the measured remaining negative resistance on the EVM is 6430

Ω (43 x margin)

(4)

With NX3225GA_25M the measured remaining negative resistance on the EVM is 1740

Ω (25 x margin)

(5)

With NX3225GA_50M the measured remaining negative resistance on the EVM is 350

Ω (11 x margin)

(6)

Maximum drive level measured was 145 µW; XTAL should at least tolerate 200 µW

SINGLE ENDED OUTPUT CHARACTERISTICS (STATUS1, STATUS0, SDO, SDA)

VDD_Yx_Yy, VDD_PRI, VDD_SEC, VDD_PLLx, DVDD, VDD_VCO = 1.71 V TO 1.89 V, 2.375 V TO 2.625 V, 3.135 V TO

3.465 V; TA = -40 °C TO 85 °C (Output load capacitance 10 pF unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Status 1, Status 0, and SDO only;

SDA is open drain and relies on

0.8 x

VOH

Output High Voltage

V

external pullup for high output; IOH =

DVDD

1 mA

0.2 x

VOL

Output Low Voltage

IOL = 1 mA

V

DVDD

Vslew

Output slew rate

30% - 70%

0.5

V/ns

IOZH

3-stat Output High Current

DVDD = 3.465 V, VIH = 3.465 V

5

µA

IOZL

3-stat Output Low Current

DVDD = 3.465 V, VIL = 0 V

-5

µA

Status Loss of Signal Detection

tLOS

LOS_REFfvco

1

2

1/f PFD

Time

Detect lock

2304

tLOCK

Status PLL Lock Detection Time

1/f PFD

Detect unlock

512

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