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CDCM6208V1RGZT Datasheet(PDF) 57 Page - Texas Instruments |
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CDCM6208V1RGZT Datasheet(HTML) 57 Page - Texas Instruments |
57 / 78 page PRI INT DIV I SEC R N M Charge Pump and Loop Filter INT DIV FRAC DIV FRAC DIV FRAC DIV FRAC DIV VCO PSA PSB PRI SEC PRI SEC REG 6 REG 8 REG 9,10,11 REG 15,16,17 REG 18,19, 20 REG 12,13,14 REG 0 REG 1 REG 2 / REG1 REG 3 REG 4 CDCM6208 Register programming REG 9 REG 12 REG 4 REG 4 REG 5 REG 7 CDCM6208 www.ti.com SCAS931A – MAY 2012 – REVISED JUNE 2012 DEVICE REGISTER MAP In SPI/I2C mode the device can be configured through twenty registers. Register 4 configures the input, Reg 0-3 the PLL and dividers, and Register 5 - 20 configures the 8 different outputs. Figure 52. Device Register Map Table 19. Register 0 BIT BIT NAME RELATED BLOCK DESCRIPTION/FUNCTION 15:10 RESERVED These bits must be set to 0 PLL Internal Loop Filter Capacitor (C3) Selection 000 → 35 pF 001 → 112.5 pF 010 → 177.5 pF PLL Internal Loop Filter 9:7 LF_C3[2:0] 011 → 242.5 pF (C3) 100 → 310 pF 101 → 377.5 pF 110 → 445 pF 111 → 562.5 pF Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 57 Product Folder Link(s): CDCM6208 |
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