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CDCM6208V1RGZT Datasheet(PDF) 56 Page - Texas Instruments

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Part # CDCM6208V1RGZT
Description  2:8 CLOCK GENERATOR, JITTER CLEANER WITH FRACTIONAL DIVIDERS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CDCM6208V1RGZT Datasheet(HTML) 56 Page - Texas Instruments

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CDCM6208
SCAS931A – MAY 2012 – REVISED JUNE 2012
www.ti.com
When the output frequency plan calls for the use of some output dividers as fractional values, the following steps
are needed to calculate the closest achievable frequencies for those using fractional output dividers and the
frequency errors (difference between the desired frequency and the closest achievable frequency).
Based on system needs, decide the frequencies that need to have best possible jitter performance.
Once decided, these frequencies need to be placed on integer output dividers.
Then a frequency plan for these frequencies with strict jitter requirements can be worked out using the
common divisor algorithm.
Once the integer divider plans are worked out, the PLL settings (including VCO frequency, feedback divider,
input divider and prescaler divider) can be worked out to map the input frequency to the frequency out of the
prescaler divider.
Then calculate the fractional divider values (whose values must be greater than 2) that are needed to support
the output frequencies that are not part of the common frequency plan from the common divisor algorithm
already worked out.
For each fractional divider value, try to represent the fractional portion in a 20 bit binary scheme, where the
first fractional bit is represented as 0.5, the second fractional bit is represented as 0.25, third fractional bit is
represented as 0.125 and so on. Continue this process until the entire 20 bit fractional binary word is
exhausted.
Once exhausted, the fraction can be calculated as a cumulative sum of the fractional bit x fractional value of
the fractional bit. Once this is done, the closest achievable output frequency can be calculated with the
mathematical function of the frequency out of the prescaler divider divided by the achievable fractional
divider.
The frequency error can then be calculated as the difference between the desired frequency and the closest
achievable frequency.
56
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Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): CDCM6208


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