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AD9633 Datasheet(PDF) 8 Page - Analog Devices |
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AD9633 Datasheet(HTML) 8 Page - Analog Devices |
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8 / 40 page  AD9633 Data Sheet Rev. 0 | Page 8 of 40 D0–A D0+A D1–A D1+A FCO– BYTEWISE MODE FCO+ D0–A D0+A D1–A D1+A FCO– DCO+ CLK+ CLK– DCO– FCO+ BITWISE MODE SDR DDR DCO+ DCO– D08 N – 17 D06 N – 17 D04 N – 17 D02 N – 17 LSB N – 17 D07 N – 16 D05 N – 16 D03 N – 16 D01 N – 16 MSB N – 17 D07 N – 17 D05 N – 17 D03 N – 17 D04 N – 16 D03 N – 16 D02 N – 16 D01 N – 16 LSB N – 16 D04 N – 17 D03 N – 17 D02 N – 17 D01 N – 17 LSB N – 17 MSB N – 17 D08 N – 17 D07 N – 17 D06 N – 17 D05 N – 17 tEH tCPD tFRAME tFCO tPD tDATA tLD tEL VIN±x tA N – 1 N N + 1 D08 N – 16 D06 N – 16 D04 N – 16 D02 N – 16 D08 N – 15 D06 N – 15 D04 N – 15 D02 N – 15 LSB N – 16 MSB N – 16 D07 N – 15 D05 N – 15 D03 N – 15 MSB N – 15 D01 N – 17 D04 N – 16 D03 N – 15 D02 N – 15 D01 N – 15 D04 N – 15 MSB N – 16 D08 N – 16 D07 N – 16 D06 N – 16 MSB N – 15 D08 N – 15 D07 N – 15 D06 N – 15 D05 N – 16 Figure 3. 10-Bit DDR/SDR, Two-Lane, 1× Frame Mode D0–A D0+A D1–A D1+A FCO– BYTEWISE MODE FCO+ D0–A D0+A D1–A D1+A FCO– DCO+ CLK+ CLK– DCO– FCO+ BITWISE MODE SDR DDR DCO+ DCO– D10 N – 16 D08 N – 16 D06 N – 16 D04 N – 16 D02 N – 16 LSB N – 16 D10 N – 17 D08 N – 17 D06 N – 17 D04 N – 17 D02 N – 17 LSB N – 17 MSB N – 16 D09 N – 16 D07 N – 16 D05 N – 16 D03 N – 16 D01 N – 16 MSB N – 17 D09 N – 17 D07 N – 17 D05 N – 17 D03 N – 17 D01 N – 17 D05 N – 16 D04 N – 16 D03 N – 16 D02 N – 16 D01 N – 16 LSB N – 16 D05 N – 17 D04 N – 17 D03 N – 17 D02 N – 17 D01 N – 17 LSB N – 17 MSB N – 16 D10 N – 16 D09 N – 16 D08 N – 16 D07 N – 16 D06 N – 16 MSB N – 17 D10 N – 17 D09 N – 17 D08 N – 17 D07 N – 17 D06 N – 17 tEH tCPD tFRAME tFCO tPD tDATA tLD tEL VIN±x tA N – 1 N N + 1 Figure 4. 12-Bit DDR/SDR, Two-Lane, 2× Frame Mode |
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