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MCM63Z737 Datasheet(PDF) 11 Page - Motorola, Inc |
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MCM63Z737 Datasheet(HTML) 11 Page - Motorola, Inc |
11 / 20 page MCM63Z737 DMCM63Z819 11 MOTOROLA FAST SRAM DC OPERATING CONDITIONS AND CHARACTERISTICS (VDD = 3.3 V ± 5%, TA = 0 to 70°C Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS (Voltages Referenced to VSS = 0 V) Parameter Symbol Min Typ Max Unit Supply Voltage VDD 3.135 3.3 3.465 V I/O Supply Voltage VDDQ* 3.135 3.3 VDD V Ambient Temperature TA 0 — 70 °C Input Low Voltage VIL – 0.3 — 0.8 V Input High Voltage VIH 2 — VDD + 0.3 V Input High Voltage I/O Pins VIH2 2 — VDDQ + 0.3 V *VDD and VDDQ are shorted together on the device and must be supplied with identical voltage levels. VIH 20% tKHKH (MIN) VSS VSS – 1.0 V Figure 5. Undershoot Voltage DC CHARACTERISTICS AND SUPPLY CURRENTS Parameter Symbol Min Typ Max Unit Notes Input Leakage Current (0 V ≤ Vin ≤ VDD) Ilkg(I) — — ± 1 µA 1 Output Leakage Current (0 V ≤ Vin ≤ VDDQ) Ilkg(O) — — ± 1 µA AC Supply Current (Device Selected, All Outputs Open, Freq = Max) Includes Supply Current for Both VDD and VDDQ IDDA — — 300 mA 2, 3, 4 Hold Supply Current (Device Selected, Freq = Max, VDD = Max, VDDQ = Max, CKE ≥ VDD – 0.2 V, All Inputs Static at CMOS Levels) IDD1 — — 15 mA 6 CMOS Standby Supply Current (Device Deselected, Freq = 0, VDD = Max, VDDQ = Max, All Inputs Static at CMOS Levels) ISB2 — — 5 mA 5, 6 TTL Standby Supply Current (Device Deselected, Freq = 0, VDD = Max, VDDQ = Max, All Inputs Static at TTL Levels) ISB3 — — 25 mA 5, 7 Output Low Voltage (IOL = 8 mA) VOL — — 0.4 V Output High Voltage (IOH = – 8 mA) VOH 2.4 — — V NOTES: 1. LBO has an internal pullup and will exhibit leakage currents of ± 5 µA. 2. Reference AC Operating Conditions and Characteristics for Input and Timing. 3. All addresses transition simultaneously low (LSB) then high (MSB). 4. Data states are all zero. 5. Device in deselected mode as defined by the Truth Table. 6. CMOS levels for I/O’s are VIT ≤ VSS + 0.2 V or ≥ VDDQ – 0.2 V. CMOS levels for other inputs are Vin ≤ VSS + 0.2 V or ≥ VDD – 0.2 V. 7. TTL levels for I/O’s are VIT ≤ VIL or ≥ VIH2. TTL levels for other inputs are Vin ≤ VIL or ≥ VIH. CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 0 to 70°C, Periodically Sampled Rather Than 100% Tested) Parameter Symbol Min Typ Max Unit Input Capacitance Cin — 4 5 pF Input/Output Capacitance CI/O — 7 8 pF |
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