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AK8181A Datasheet(PDF) 1 Page - Asahi Kasei Microsystems |
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AK8181A Datasheet(HTML) 1 Page - Asahi Kasei Microsystems |
1 / 8 page ![]() AK8181A MS1342-E-00 Nov-2011 - 1 - Features Four differential 3.3V LVPECL outputs Selectable two LVTTL/LVCMOS inputs Clock output frequency up to 266MHz Output skew : 30ps maximum Part-to-part skew : 200ps maximum Propagation delay : 1.4ns maximum Additive phase jitter(RMS) : < 0.06ps(typical) Operating Temperature Range: -40 to +85℃ Package: 20-pin TSSOP (Pb free) Pin compatible with ICS8535I-01 Description The AK8181A is a member of AKM’s LVPECL clock fanout buffer family designed for telecom, networking and computer applications, requiring a range of clocks with high performance and low skew. The AK8181A distributes 4 buffered clocks. AK8181A are derived from AKM’s long-term- experienced clock device technology, and enable clock output to perform low skew. The AK8181A is available in a 20-pin TSSOP package. Block Diagram 0 1 CLK_SEL CLK0 CLK1 Q D LE CLK_EN Q3 Q3n Q2 Q2n Q1 Q1n Q0 Q0n 3.3V LVPECL 1:4 Clock Fanout Buffer AK8181A |
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