AK8181A

Nov-2011

MS1342-E-00

- 2 -

Pin Descriptions

Package: 20-Pin TSSOP (Top View)

Pin No.

Pin Name

Pin

Type

Pullup

down

Description

1

VSS

PWR

--

Negative supply

2

CLK_EN

IN

PU

Synchronizing clock output enable (LVCMOS/LVTTL)

H: clock outputs follow clock input.

L: Q outputs are forced low, Qn outputs are forced high.

3

CLK_SEL

IN

PD

CLK Select Input (LVCMOS/LVTTL)

H: selects CLK1 input

L: selects CLK0 input

4

CLK0

IN

PD

LVCMOS/LVTTL Clock Input

5

NC

--

--

No connect

6

CLK1

IN

PD

LVCMOS/LVTTL Clock Input

7

NC

--

--

No connect

8,

TEST

--

--

Factory use. Internally pulled down. Leave open or tied to VSS.

9

NC

--

--

No connect

10

VDD

PWR

--

Power supply

11, 12

Q3n, Q3

OUT

--

Differential clock output pair (LVPECL)

13

VDD

PWR

--

Power supply

14, 15

Q2n, Q2

OUT

--

Differential clock output (LVPECL)

16, 17

Q1n, Q1

OUT

--

Differential clock output (LVPECL)

18

VDD

PWR

--

Power supply

19, 20

Q0n, Q0

OUT

--

Differential clock output (LVPECL)

Ordering Information

Part Number

Marking

Shipping

Packaging

Package

Temperature

Range

AK8181A

AK8181A

Tape and Reel

20-pin TSSOP

-40 to 85 ℃