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CLRC663 Datasheet(PDF) 92 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 92 Page - NXP Semiconductors |
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92 / 132 page  CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 92 of 132 NXP Semiconductors CLRC663 Contactless reader IC 9.10.5 TxWaitLo 9.11 FrameCon Table 149. TxWaitLo register (address 32h) Bit 7 6 5 4 3 2 1 0 Symbol TxWaitLo Access rights r/w Table 150. TxWaitLo bits Bit Symbol Description 7 to 0 TxWaitLo Defines the minimum time between receive and send or between two send data streams Note: TxWait is a 11bit register (additional 3 bits are in the TxWaitCtrl register)! See also TxWaitEtu and TxWaitStart. Table 151. FrameCon register (address 33h) Bit 7 6 5 4 3 2 1 0 Symbol TxParityEn RxParityEn - - StopSym StartSym Access rights r/w r/w RFU RFU r/w r/w Table 152. FrameCon bits Bit Symbol Description 7 TxParityEn If set, a parity bit is calculated and appended to each byte transmitted 6 RxParityEn If set, the parity calculation is enabled. The parity is not transferred to the FIFO 5 to 4 - RFU 3 to 2 StopSym Defines which symbol is sent as stop-symbol • 0h: No symbol is sent • 1h: Symbol1 is sent • 2h symbol2 is sent • 3h Symbol3 is sent 1 to 0 StartSym Defines which symbol is sent as start-symbol • 0h: No symbol is sent • 1h: Symbol1 is sent • 2h symbol2 is sent • 3h Symbol3 is sent |
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