 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
CLRC663 Datasheet(PDF) 56 Page - NXP Semiconductors |
|
||||||||||||||||||||||||||||||
CLRC663 Datasheet(HTML) 56 Page - NXP Semiconductors |
|
|
56 / 132 page  CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 56 of 132 NXP Semiconductors CLRC663 Contactless reader IC This command does not terminate automatically, when the card does not answer, therefore the timer should be initialized to automatic mode. In this case, beside the bit IdleIRq the bit TimerIRq can be used as termination criteria. During authentication processing the bits RxIRq and TxIRq are blocked. The Crypto1On shows if the authentication was successful. The following data shall be written to the FIFO before the command can be activated: • Authentication command code (60h, 61h) • Block address • Card serial number byte 0 • Card serial number byte 1 • Card serial number byte 2 • Card serial number byte 3 In total, 6 bytes are written to the FIFO. Remark: When the MFAuthent command is active, any FIFO access is blocked. If there is an attempt to access to the FIFO during MFAuthent being active, the bit WrErr in the Error register is set. This MFAuthent command terminates automatically when the MIFARE card is authenticated and the bit MFCrypto1On in the Status register is set to logic 1. This MFAuthent command does not terminate automatically when the card does not answer, therefore the timer should be initialized to automatic mode. In this case, beside the bit IdleIrq, the bit TimerIrq can be used as termination criteria. During authentication processing the bit RxIrq and bit TxIrq are blocked. The Crypto1On bit is only valid after termination of the authentication command (either after processing the protocol or after writing IDLE to the command register). In case there is an error during authentication, the bit ProtocolErr in the Error register is set to logic 1 and the bit Crypto1On in register Status2Reg is set to logic 0. 8.10.3.5 AckReq command Command (04h); Performs a Query (Full command must be written into the FIFO); a Ack and a ReqRn command. All answers to the command will be written into the FIFO. The error flag is copied after the answer into the FIFO. This command terminates automatically when finished and the active command is idle. 8.10.3.6 Receive command Command (05h); The CLRC663 activates the receiver path and waits for any data stream to be received. The correct settings have to be chosen before starting this command. This command terminates automatically when the received data stream ends. This is indicated either by the end of frame pattern or by the length byte depending on the selected framing and speed. |
Similar Part No. - CLRC663 |
|
Similar Description - CLRC663 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
