W9412G2IB datasheet(29/50 Pages) WINBOND

Part #	W9412G2IB

Description	1M 횞 4 BANKS 횞 32 BITS GDDR SDRAM

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Manufacturer	WINBOND [Winbond]

Direct Link	http://www.winbond.com

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W9412G2IB

Publication Release Date: Aug. 30, 2010

- 29 -

Revision A06

AC Characteristics and Operating Condition, continued

-4

-5/-5I

-6/-6I

SYM.

PARAMETER

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

UNIT NOTES

tWPREH

Clock to DQS Write Preamble Hold Time

0.25

tWPST

DQS Write Postamble Time

0.4

0.6

0.4

0.6

0.4

0.6

tDQSS

Write Command to First DQS Latching

Transition

0.72

1.25

0.72

1.25

0.75

1.25

tCK

11

tIS

Input Setup Time

0.75

0.8

tIH

Input Hold Time

0.75

0.8

tHZ

Data-out

High-impedance

Time

from

CLK, CLK

0.7

tLZ

Data-out

Low-impedance

Time

from

CLK, CLK

-0.7

0.7

-0.7

0.7

-0.7

0.7

tT(SS)

SSTL Input Transition

0.5

1.5

0.5

1.5

0.5

1.5

nS

tWTR

Internal Write to Read Command Delay

2

1

tCK

tXSNR

Exit Self Refresh to non-Read Command

72

75

nS

tXSRD

Exit Self Refresh to Read Command

200

tCK

tREFi

Refresh Interval Time (4K/64mS)

15.6

µS

17

tMRD

Mode Register Set Cycle Time

8

10

12

nS

9.7 AC Test Conditions

PARAMETER

SYMBOL

VALUE

UNIT

Input High Voltage (AC)

VIH

VREF + 0.31

V

Input Low Voltage (AC)

VIL

VREF - 0.31

V

Input Reference Voltage

VREF

0.5 x VDDQ

V

Termination Voltage

VTT

0.5 x VDDQ

V

Input Signal Peak to Peak Swing

VSWING

1.0

V

Differential Clock Input Reference Voltage

VR

Vx (AC)

V

Input Difference Voltage. CLK and CLK Inputs (AC)

VID (AC)

1.5

V

Input Signal Minimum Slew Rate

SLEW

1.0

V/nS

Output Timing Measurement Reference Voltage

VOTR

0.5 x VDDQ

V

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