W9412G2IB datasheet(25/50 Pages) WINBOND

Part #	W9412G2IB

Description	1M 횞 4 BANKS 횞 32 BITS GDDR SDRAM

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Manufacturer	WINBOND [Winbond]

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W9412G2IB

Publication Release Date: Aug. 30, 2010

- 25 -

Revision A06

9. ELECTRICAL CHARACTERISTICS

9.1 Absolute Maximum Ratings

PARAMETER

SYMBOL

RATING

UNIT

Input/Output Voltage

VIN, VOUT

-0.3 ~ VDDQ + 0.3

V

Power Supply Voltage

VDD, VDDQ

-0.3 ~ 3.6

V

Operating Temperature (-4/-5/-6)

TOPR

0 ~ 70

°C

Operating Temperature (-5I/-6I)

TOPR

-40 ~ 85

°C

Storage Temperature

TSTG

-55 ~ 150

°C

Soldering Temperature (10s)

TSOLDER

260

°C

Power Dissipation

PD

1

W

Short Circuit Output Current

IOUT

50

mA

Note: Stresses greater than those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device.

This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in

the operational sections of this specification is not implied.

Exposure to absolute maximum rating conditions for extended periods may affect reliability.

9.2 Recommended DC Operating Conditions

(TA = 0 to 70°C for -4/-5/-6, TA = -40 to 85°C for -5I/-6I)

SYM.

PARAMETER

MIN.

TYP.

MAX.

UNIT

NOTES

VDD

Power Supply Voltage (for -5/-5I/-6/-6I)

2.3

2.5

2.7

V

2

VDD

Power Supply Voltage (for -4)

2.4

2.5

2.6

V

2

VDDQ

I/O Buffer Supply Voltage (for -5/-5I/-6/-6I)

2.3

2.5

2.7

V

2

VDDQ

I/O Buffer Supply Voltage (for

-4)

2.4

2.5

2.6

V

2

VREF

Input reference Voltage

0.49 x VDDQ

0.50 x VDDQ

0.51 x VDDQ

V

2, 3

VTT

Termination Voltage (System)

VREF - 0.04

VREF

VREF + 0.04

V

2, 8

VIH (DC)

Input High Voltage (DC)

VREF + 0.15

-

VDDQ + 0.3

V

2

VIL (DC)

Input Low Voltage (DC)

-0.3

-

VREF - 0.15

V

2

VICK (DC)

Differential Clock DC Input Voltage

-0.3

-

VDDQ + 0.3

V

15

VID (DC)

Input Differential Voltage.

CLK and CLK inputs (DC)

0.36

-

VDDQ + 0.6

V

13, 15

VIH (AC)

Input High Voltage (AC)

VREF + 0.31

-

V

2

VIL (AC)

Input Low Voltage (AC)

-

VREF - 0.31

V

2

VID (AC)

Input Differential Voltage.

CLK and CLK inputs (AC)

0.7

-

VDDQ + 0.6

V

13, 15

VX (AC)

Differential AC input Cross Point Voltage

VDDQ/2 - 0.2

-

VDDQ/2 + 0.2

V

12, 15

VISO (AC)

Differential Clock AC Middle Point

VDDQ/2 - 0.2

-

VDDQ/2 + 0.2

V

14, 15

Notes: Undershoot Limit: VIL (min) = -1.5V with a pulse width < 5 nS

Overshoot Limit: VIH (max) = VDDQ +1.5V with a pulse width < 5 nS

VIH (DC) and VIL (DC) are levels to maintain the current logic state.

VIH (AC) and VIL (AC) are levels to change to the new logic state.

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