ISL267440, ISL267450A

2

FN7708.0

December 5, 2011

Typical Connection Diagram

Pin Configuration

ISL267440, ISL267450A

(8 LD MSOP)

TOP VIEW

VREF

VIN+

VIN–

GND

VDD

SCLK

SDATA

CS

+

+

+3V/5V

SUPPLY

μP/μC

VREF

SERIAL

INTERFACE

10

μF

0.1

μF

VREF

8

7

6

5

1

2

3

4

VIN+

VIN

–

GND

VDD

SCLK

SDATA

CS

Pin Descriptions

ISL267440, ISL267450A

DESCRIPTION

PIN NAME PIN NUMBER

VDD

8

Supply voltage, +2.7V to 5.25V.

SCLK

7

Serial clock input. Controls digital I/O timing and clocks the conversion.

SDATA

6

Digital conversion output.

CS

5

Chip select input. Generally controls the start of a conversion though not always the sampling signal.

GND

4

Ground

VIN–

3

Negative analog input.

VIN+

2

Positive analog input.

VREF

1

Reference voltage.