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GS9092A Datasheet(PDF) 25 Page - Gennum Corporation

Part # GS9092A
Description  GenLINX III 270Mb/s Serializer for SDI and DVB-ASI
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Manufacturer  GENNUM [Gennum Corporation]
Direct Link  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS9092A Datasheet(HTML) 25 Page - Gennum Corporation

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GS9092A GenLINX® III 270Mb/s Serializer for SDI and
DVB-ASI
Data Sheet
34715 - 4
May 2010
25 of 63
3.3 Internal FIFO Operation
The GS9092A contains an internal video line-based FIFO, which can be programmed by
the application layer to work in any of the following modes:
1. Video Mode
2. DVB-ASI Mode
3. Ancillary Data Insertion Mode
4. Bypass Mode
The FIFO can be configured to one of the four modes by setting the FIFO_MODE[1:0] bits
of the IOPROC_DISABLE register via the host interface (see Table 3-4 in Packet
Generation and Insertion on page 38). The setting of these bits is shown in Table 3-2. To
enable the FIFO, the application layer must also set the FIFO_EN pin HIGH. Additionally,
if the FIFO is configured for video mode or ancillary data insertion mode, the
IOPROC_EN pin must be set HIGH.
The FIFO is fully asynchronous, allowing simultaneous read and write access. It has a
depth of 2048 words, and can store up to 1 full line of SD video for both 525 and 625
standards.
NOTE: The F, V, and H signals will be ignored when the FIFO is configured for DVB-ASI
mode or bypass mode.
Table 3-2: FIFO Configuration Bit Settings
FIFO Mode
FIFO_MODE[1:0]
Register Setting
FIFO_EN
Pin Setting
IOPROC_EN
Pin Setting
Video Mode00b
HIGHHIGH
DVB-ASI Mode01b
HIGHX
Ancillary Data
Insertion Mode
10b
HIGHHIGH
Bypass Mode11b
XX
NOTE: ‘X’ signifies ‘don’t care’. The pin is ignored and may be set HIGH or LOW.


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