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TUSB8040_1110 Datasheet(PDF) 24 Page - Texas Instruments |
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TUSB8040_1110 Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 33 page  TUSB8040 SLLSE42F – SEPTEMBER 2010 – REVISED OCTOBER 2011 www.ti.com 3.3.16 Manufacturer String Registers Table 3-32. Register Offset 50h-8Fh BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 Table 3-33. Bit Descriptions – Manufacturer String Register BIT FIELD NAME ACCESS DESCRIPTION Manufacturer string byte N. These registers provide the string values returned for string index 3 when mfgStringLen is greater than 0. The number of bytes returned in the string is 7:0 mfgStringByte[n] RW equal to mfgStringLen. The programmed data should be in UNICODE UTF-16LE encodings as defined by The Unicode Standard, Worldwide Character Encoding, Version 5.0. 3.3.17 Product String Registers Table 3-34. Register Offset 90h-CFh BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 Table 3-35. Bit Descriptions – Product String Register BIT FIELD NAME ACCESS DESCRIPTION Product string byte N. These registers provide the string values returned for string index 2 when prodStringLen is greater than 0. The number of bytes returned in the string is equal to 7:0 prodStringByte[n] RW prodStringLen. The programmed data should be in UNICODE UTF-16LE encodings as defined by The Unicode Standard, Worldwide Character Encoding, Version 5.0. 3.3.18 Device Status and Command Register Table 3-36. Register Offset F8h BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 Table 3-37. Bit Descriptions – Device Status and Command Register BIT FIELD NAME ACCESS DESCRIPTION 7:2 RSVD RO Reserved. Read only, returns 0 when read. SMBus interface reset. This bit resets the SMBus slave interface to its default state and loads the registers back to their GRSTz values. 1 smbusRst RSU This bit is set by writing a 1 and is cleared by hardware on completion of the reset. A write of 0 has no effect. (Not used with I2C) Configuration active. This bit indicates that configuration of the TUSB8040 is currently active. The bit is set by hardware when the device enters the I2C or SMBus mode. The TUSB8040 does not connect on the upstream port while this bit is 1. 0 cfgActive RCU When in I2C mode, the bit is cleared by hardware when the TUSB8040 exits the I2C mode. When in the SMBus mode, this bit must be cleared by the SMBus host in order to exit the configuration mode and allow the upstream port to connect. The bit is cleared by a writing 1. A write of 0 has no effect. 24 FUNCTIONAL DESCRIPTION Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TUSB8040 |
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