ADC1613D_11 datasheet(25/43 Pages) NXP

Part #	ADC1613D

Description	Dual 16-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface

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Manufacturer	NXP [NXP Semiconductors]

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ADC1613D_SER

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Product data sheet

Rev. 3 — 9 February 2011

25 of 43

NXP Semiconductors

ADC1613D series

Dual 16-bit ADC: serial JESD204A interface

The steps for a data transfer:

1. A falling edge on pin CS in combination with a rising edge on pin SCLK determine the

start of communications.

2. The first phase is the transfer of the 2-byte instruction.

3. The second phase is the transfer of the data which can vary in length but always a

multiple of 8 bits. The MSB is always sent first (for instruction and data bytes)

4. A rising edge on pin CS indicates the end of data transmission.

11.6.2 Channel control

The two ADC channels can be configured at the same time or separately. By using the

register “Channel index”, the user can choose which ADC channel receives the next

SPI-instruction. By default the channel A and B receives the same instructions in write

mode. In read mode only A is active.

Fig 23. Transfer diagram for two data bytes (3-wire type)

CS

SCLK

SDIO

R/W

W1

W0

A12 A11 A10

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

D7

D6

D5

D4

D3

D2

D1

D3

D2

D1

D0

D7

D6

D5

D4

Instruction bytes

Register N (data)

Register N + 1 (data)

005aaa086

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ADC1613D Datasheet(PDF) 25 Page - NXP Semiconductors

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