JUNE 2003

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 2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.

NETWORK SEARCH ENGINE

128K x 72 Entries

Datasheet

Brief

75K62100

Device Description

IDT provides proven, industry-leading network search engines

(NSEs)andacomprehensivesuiteofsoftwarethatenableandaccelerate

the intelligent processing of network services in communications equip-

ment.AsapartofthecompleteIDTclassificationsubsystemthatincludes

content inspection engines, the IDT family of NSEs delivers high-

performance, feature-rich, easy-to-use, integrated search accelerators.

TheIDT 75K62100NSEisahighperformancepipelinedlow-power,

synchronous full-ternary 128K x 72 entry device. Each entry location in

the NSE has both a Data entry and an associated Mask entry. The NSE

devices integrate content addressable memory (CAM) technology with

high-performance logic. They can perform Lookup and Learn NSE

operations plus Read, Write, Burst Write, and Dual Write maintenance

operations.

The IDT 75K62100 NSE device has a bi-directional bus that is a

multiplexed address and data bus that can support 100 million sustained

searches per second. This device provides array segments which can

be configured to enable multiple width lookups from 36 to 576 bits wide.

supply. This NSE device provides the user with flexibility and control in

determining the device power. Only the array segments that will be used

for a specific NSE operation are powered up while the unused segments

are not.

TheIDT75K62100utilizesthelatesthigh-performance1.2VCMOS

processingtechnologyandispackagedinaJEDECStandard,thermally

enhanced, low profile Ball Grid Array. The IDT 372 BGA package

provides increased heat transfer for thermally challenged systems. The

372 BGA footprint is backwards compatible with the IDT 64K x 72 Entry

(75P52100) and 32K x 72 Entry (75P42100) NSE devices.

Configuration Registers

and

Ram Control Circuits

CLOCK

CCLK

÷2

PHASE

SRAM CONTROL

P

R

I

O

R

I

T

Y

E

N

C

O

D

E

R

S

I

Z

E

L

O

G

I

C

D

E

C

O

D

E

Address

MMOUT

MATCHOUT

REQSTB

R/W

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RESET

Command

Bus

Request

Data

Bus

Index

Bus

Counter

BURST

NSE

REQUEST

BUS

NSE

RESPONSE

BUS

LAST NSE

LAST SRAM

ASIC FEEDBACK

Bypass

DATA

ARRAY

Comparand Registers

Instruction

Global Mask Registers

Result Register

Block Diagram

Figure 1.0 ASIC / Compatible NSE / SRAM configuration

System Configurations

The IDT NSEs are designed to fulfill the needs of various types of

networking systems. In solutions requiring data searching such as

routers, a system configuration as shown in Figure 1.0 may be realized.

Maximum flexibility is provided by allowing one board design to be

populated today using either the IDT 75P42100 or 75P52100 NSEs and

later upgraded to use the IDT 75K62100 NSE. Applications note AN-279

discusseshowtoaccommodateoneboarddesignforanyoftheseNSEs.

In this compatible configuration, the NSE interfaces directly to an

ASIC/ FPGA for lookups and routes an Index to an associated SRAM

device, which supplies the next hop address via an SRAM Data Bus to

the ASIC. The NSE provides the required control signals to directly

hookup to ZBT™ or Synchronous Pipeline Burst SRAM. Lookup results

canalsobefeddirectlybacktotheASIC/FPGAwithouttheuseofexternal

SRAM. Control of the associated handshake signals is provided by all

NSEs to adapt to either configuration.

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Optional

ASIC

or

FPGA

ZBT

or

Sync SRAM

To request the full IDT75K62100 datasheet, please contact your local

IDT Sales Representative or call 1-800-345-7015

IDT

75P42100

or

75P52100

or

75K62100

Network Search Engine