LH543601 datasheet(28/43 Pages) SHARP

Part #	LH543601

Description	256 x 36 x 2 Bidirectional FIFO

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Manufacturer	SHARP [Sharp Corporation]

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TIMING DIAGRAMS (cont’d)

HF1 (HF2)

EH

t

ES

t

HF

t

HF

t

CK (CK )

AB

EN (EN )

AB

CK (CK )

BA

EH

t

ES

t

R/W (R/W )

A

B

R/W (R/W )

B

A

EN (EN )

BA

RWH

t

RWS

t

RWH

t

RWS

t

543601-5

NOTES:

1. A2A, A1A, and A0A all are held HIGH for FIFO access at Port A.

A0B is held HIGH for FIFO access at Port B.

2. Parameters without parentheses apply to FIFO #1 operation.

Parameters with parentheses apply to FIFO #2 operation.

3. Both assertion and deassertion of the Half-Full Flags are controlled

entirely by rising clock edges, rather than by falling clock edges.

tRQS

tRQH

REQA (REQB)

tRQS

tRQH

REQB (REQA)

Figure 19.

Half-Full Flag Timing

LH543601

256

× 36 × 2 Bidirectional FIFO

28

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Integrated Device Techn...	IDT72V3624	362Kb / 34P	3.3 VOLT CMOS SyncBiFIFO WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
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LH543601 Datasheet(PDF) 28 Page - Sharp Corporation

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