LH543601 datasheet(27/43 Pages) SHARP

Part #	LH543601

Description	256 x 36 x 2 Bidirectional FIFO

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Manufacturer	SHARP [Sharp Corporation]

Direct Link	http://sharp-world.com/

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TIMING DIAGRAMS (cont’d)

AF1 (AF2)

EH

t

ES

t

AF

t

AF

t

CK (CK )

AB

EN (EN )

AB

CK (CK )

BA

R/W (R/W )

A

B

R/W (R/W )

B

A

RWH

t

RWS

t

RWH

t

RWS

t

543601-4

NOTES:

1. A2A, A1A, and A0A all are held HIGH for FIFO access at Port A.

A0B is held HIGH for FIFO access at Port B.

2. Parameters without parentheses apply to FIFO #1 operation.

Parameters with parentheses apply to FIFO #2 operation.

3. Assertion of the Almost-Full Flags is controlled by rising clock edges,

whereas deassertion of the Almost-Full Flags is controlled by falling

clock edges.

tRQS

tRQH

REQA (REQB)

EH

t

ES

t

EN (EN )

BA

tRQS

tRQH

REQB (REQA)

Figure 18. Almost-Full Flag Timing

256

× 36 × 2 Bidirectional FIFO

LH543601

27

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Manufacturer	Part #	Datasheet	Description
Sharp Corporation	LH5420	2Mb / 35P	256 x 36 x 2 Bidirectional FIFO
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Integrated Device Techn...	IDT723622	294Kb / 26P	CMOS SyncBiFIFOO 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2
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Integrated Device Techn...	IDT72V3624	362Kb / 34P	3.3 VOLT CMOS SyncBiFIFO WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
Renesas Technology Corp	IDT723626	404Kb / 36P	CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 MARCH 2018
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	IDT72V3626	742Kb / 37P	3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 FEBRUARY 2009

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LH543601 Datasheet(PDF) 27 Page - Sharp Corporation

LH543601 Datasheet(HTML) 27 Page - Sharp Corporation

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