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LH543601 Datasheet(PDF) 22 Page - Sharp Corporation |
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LH543601 Datasheet(HTML) 22 Page - Sharp Corporation |
22 / 43 page ![]() TIMING DIAGRAMS (cont’d) MAILBOX IN WRITE TO MAILBOX #2 READ FROM MAILBOX #1 EH t ES t DH t DS t EH t ES t A t AH t AS t AH t AS t MBF t MAXIMUM OF 2 CKA CYCLES LATENCY t OH A t t ZX MAILBOX OUT NOTES: 1. Both edges of MBF2 are synchronized to the Port A clock, CKA. 2. Both edges of MBF1 are synchronized to the Port B clock, CKB. 3. There is a maximum of two CKA clock cycles of synchronization latency before MBF2 is asserted to indicate valid new mailbox data. 4. The status of mailbox flags does not prevent mailbox read or write operations. CKB R/WB ENB A0B MBF1 CKA MBF2 OEB D0B - D35B RWH t RWS t RWH t RWS t MBF t 543601-23 REQB tRQS tRQH tRQS tRQH Figure 13. Port B Mailbox Access LH543601 256 × 36 × 2 Bidirectional FIFO 22 |
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