Table 4. Status Flags

NUMBER OF UNREAD DATA WORDS PRESENT WITHIN FIFO

1, 2

FULL

FLAG

MIDDLE FLAGS

EMPTY

FLAG

512

× 18 FIFO

1024

× 18 FIFO

FF

PAF

HF

PAE

EF

0

0

HHH

L

L

1 to q

1 to q

H

H

H

L

H

(q + 1) to 256

(q + 1) to 512

HHHH

H

257 to (512 – (p + 1))

513 to (1024 – (p + 1))

H

H

L

H

H

(512 – p) to 511

(1024 – p) to 1023

H

L

L

H

H

512

1024

L

L

L

H

H

NOTES:

1.

q = Programmable-Almost-Empty Offset value. (Default values: 512

× 18, q = 63; 1024 × 18, q = 127.)

2.

p = Programmable-Almost-Full Offset value. (Default values: 512

× 18, p = 63; 1024 × 18, p = 127.)

3.

Only 9 (512

× 18) or 10 (1024 × 18) of the 12 offset-value-register bits should be programmed. The unneeded most-significant-end bits should

be LOW (zero).

4.

The flag output is delayed by one full clock cycle in Enhanced Operating Mode, when synchronous operation is specified for intermediate flags.

DESCRIPTION OF SIGNALS AND OPERATING SEQUENCES (cont’d)

BOLD ITALIC = Enhanced Operating Mode

512 x 18/1024 x 18 Synchronous FIFO

LH540215/25

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