LH540215 datasheet(10/48 Pages) SHARP

Part #	LH540215

Description	512 x 18 / 1024 x 18 Synchronous FIFO

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Manufacturer	SHARP [Sharp Corporation]

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AC ELECTRICAL CHARACTERISTICS

SYMBOL

PARAMETER

–20

–25

-35

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

fCC

Clock Cycle Frequency

50

40

28.6

tA

Data Access Time

2

12

3

15

3

20

tCLK

Clock Cycle Time

20

25

35

tCLKH

Clock HIGH Time

8

10

14

tCLKL

Clock LOW Time

8

10

14

tDS

Data Setup Time

5

6

7

tDH

Data Hold Time

2

tENS

Enable Setup Time

5

6

7

tENH

Enable Hold Time

2

tRS

Reset Pulse Width

1

20

25

35

tRSS

Reset Setup Time

2

12

15

20

tRSR

Reset Recovery Time

2

12

15

20

tRSF

Reset to Flag and Output Time

30

35

40

tOLZ

Output Enable to Output in Low-Z

2

000

tOE

Output Enable to Output Valid

9

12

15

tOHZ

Output Enable to Output in High-Z

2

19

1

12

1

15

tWFF

Write Clock to Full Flag

12

15

20

tREF

Read Clock to Empty Flag

12

15

20

tPAF

Clock to Programmable Almost-Full Flag (IDT-Compatible Operating

Mode)

14

17

23

tPAE

Clock to Programmable Almost-Empty Flag (IDT-Compatible

Operating Mode)

14

17

23

tHF

Clock to Half-Full Flag (IDT-Compatible Operating Mode)

14

17

23

tPAFS

Clock to Programmable Almost-Full Flag

(Enhanced Operating Mode)

14

17

23

tPAES

Clock to Programmable Almost-Empty Flag

(Enhanced Operating Mode)

14

17

23

tHFS

Clock to Half-Full Flag (Enhanced Operating Mode)

14

17

23

tXO

Clock to Expansion-Out

12

15

20

tXI

Expansion-In Pulse Width

7

9

13

tXIS

Expansion-In Setup Time

7

9

14

tSKEW1

Skew Time Between Read Clock and Write Clock for Full Flag

3

911

16

tSKEW2

Skew Time Between Write Clock and Read Clock for Empty Flag

4

911

16

NOTES:

1.

Pulse widths less than the stated minimum values may cause incorrect operation.

2.

Values are guaranteed by design; not currently tested.

3.

These times also apply to the Programmable-Almost-Full and Half-Full flags when they are synchronized to WCLK.

4.

These times also apply to the Half-Full and Programmable-Almost-Empty flags when they are synchronized to RCLK.

BOLD ITALIC = Enhanced Operating Mode

LH540215/25

512 x 18/1024 x 18 Synchronous FIFO

10

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Manufacturer	Part #	Datasheet	Description
Integrated Device Techn...	IDT72511	434Kb / 28P	PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18
	IDT72510	440Kb / 32P	BUS-MATCHING BIDIRECTIONAL FIFO 512 x 18-BIT . 1024 x 9-BIT 1024 x 18-BIT . 2048 x 9-BIT
	IDT72205LB	181Kb / 16P	CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18
Sharp Corporation	LH543611	475Kb / 57P	512 x 36 x 2 / 1024 x 36 x 2 Synchronous Bidirectional FIFO
Texas Instruments	SN74V215	590Kb / 43P	[Old version datasheet] 512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
	SN74V215	600Kb / 43P	[Old version datasheet] 512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
	SN74V215	555Kb / 40P	[Old version datasheet] 512 X 18, 1024 X 18, 2048 X 18, 4096 X 18 DSP-SYNC FIRST-IN, FIRST-OUT MEMORIES
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Integrated Device Techn...	IDT72V205	214Kb / 25P	3.3 VOLT CMOS SyncFIFO 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, and 4,096 x 18
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LH540215 Datasheet(PDF) 10 Page - Sharp Corporation

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