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TPS40322 Datasheet(PDF) 23 Page - Texas Instruments |
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TPS40322 Datasheet(HTML) 23 Page - Texas Instruments |
23 / 40 page OUT1 OUT1 IN1(min) RIPPLE(cap) IN(min) SW I V 10 A 1.2 V C 15 F V V f 200 mV 8 V 500 kHz ´ ´ = = = m ´ ´ ´ ´ ( ) RIPPLE(esr ) MAX 1 OUT1 RIPPLE1 2 V 50 mV ESR 4.44 m 11.25 A I I = = = W + ´ ( ) ( ) OUT1 RMS cin1 I I D 1 D 10 A 0.15 (1 0.15) 3.57 A = ´ ´ - = ´ ´ - = OUT1 IN(min) V D V = m = = = W ´ m ´ W DCR L1 0.88 H R13 2.8 k C V 0.1 F 3.15 m ( ) ( ) ( ) ´ = - CS max DCR CS max R13 V R15 V V ( ) ( ) ( ) = ´ ´ ´ DCR L peak V DCR 1.2 I 1.3 TPS40322 www.ti.com SLUSAF8 – JUNE 2011 A 744314110 from Wurth-Midcom with 1.1- µH zero current inductance is selected. Inductance for this part is 0.88- µH at 10 A bias. This 15-A, 3.15 mΩ inductor exceeds the minimum inductor ratings in a 7 mm x 7 mm package. Input Capacitor Selection (C3 through C6) The input voltage ripple is divided between the capacitance and ESR of the input capacitor. For this design VRIPPLE(cap) = 200 mV and VRIPPLE(esr) = 50 mV. The minimum capacitance and maximum ESR are estimated using Equation 16. (16) (17) The RMS current in the input capacitors is estimated using Equation 18. (18) (19) To achieve these goals, two 0805, 10- µF capacitors, one 0605, 1.0-µF capacitor and one 0402, 0.1-µF X5R ceramic capacitor are combined at the input. MOSFET Selection (Q1) Texas Instruments CSD86330, 20-A power block device was chosen. This device incorporates the high-side and low-side MOSFETs in a single 3 mm x 3 mm package. The high-side MOSFET has an on-resistance (RDS(on)) of 8.8 m Ω, while the low-side on-resistance (RDS(on)) is 4.6 mΩ, both at 4.5 V gate voltage. A 5.11-Ω gate resistor is used on the HDRV pin on each device for added noise immunity. ILIM Resistor (R2) The output current is sensed across the DCR of the L1 output inductor. An RC combination having a time constant equal to that of the L1 inductance and the DCR is used to extract the current information as a voltage. A standard capacitor value of 0.1- µF is used. The resistor, R13, can be calculated using Equation 20. (20) A standard 3.09-k Ω resistor was selected. This design limits the maximum voltage drop across the current sense inputs, VCS(max), to 60 mV. If the voltage drop across the DCR of the inductor is greater than VCS(max), after allowing for 30% overshoot spikes and a 20% variation in the DCR value, then a resistor is added to divide the voltage down to 60 mV. The divider resistor, R15, is calculated by Equation 21. where (22) (22) The TPS40322 uses the negative drop across the low-side FET at the end of the “OFF” time to measure the inductor current. Allowing for 20% over the minimum current limit for transient recovery and 20% rise in RDS(on)Q2 for self-heating of the MOSFET, the voltage drop across the low-side FET at current limit is given by Equation 23. Copyright © 2011, Texas Instruments Incorporated 23 |
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