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TPS40322 Datasheet(PDF) 18 Page - Texas Instruments |
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TPS40322 Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 40 page  ´ = 9 RT SW 20 10 R f PWM1 0° PWM2 180° SYNC SYNC PWM1 90° PWM2 270° PWM1 PWM2 TPS40322 Master TPS40322 Slave PWM1 PWM2 PHSET PHSET BP6 UDG-11117 TPS40322 SLUSAF8 – JUNE 2011 www.ti.com Shutdown During the shutdown sequence, BP6 is controlled by ENx/SSx. If both of ENx/SSx pins are pulled low, BP6 is turned off regardless of the input voltage remaining higher than programmed UVLO threshold. Switching Frequency and Master/Slave Synchronization The switching frequency is set by the value of the resistor connected from the RT pin to AGND. The RT resistor value is calculated in Equation 5. where • RRT is the the resistor from RT pin to AGND, in Ω • fSW is the desired switching frequency, in Hz (5) The TPS40322 device can also synchronize to an external clock that is ±20% of the master clock frequency which is two times the free running frequency. Each TPS40322 can be set by the PHSET pin as either master or slave. The master produces a 50% duty cycle clock to the slave. The slave synchronizes to the external clock with 50% duty cycle and selects the phase shift angle as shown in Table 1. Figure 21 shows an example on synchronizing two TPS40322 devices to generate an evenly distributed shift to reduce input ripple. Table 1. Phase Shift Angle Selection PHSET MODE PHASE ANGLE ( °) RANGE CONNECTION CH1 CH2 (V) AGND < 0.5 Master 0 180 Floating 0.6 to 2 Slave 0 180 High > 2.1 Slave 90 270 XXXX XXXX Figure 21. Synchronizing Two TPS40322 Devices 18 Copyright © 2011, Texas Instruments Incorporated |
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