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SC16IS740 Datasheet(PDF) 48 Page - NXP Semiconductors |
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SC16IS740 Datasheet(HTML) 48 Page - NXP Semiconductors |
48 / 63 page SC16IS740_750_760 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 — 9 June 2011 48 of 63 NXP Semiconductors SC16IS740/750/760 Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR Fig 26. SCL delay after reset 002aab437 RESET SCL td15 tw(rst) Rise and fall times refer to VIL and VIH. Fig 27. I2C-bus timing diagram SCL SDA tHD;STA tSU;DAT tHD;DAT tf tBUF tSU;STA tLOW tHIGH tVD;ACK 002aab489 tSU;STO protocol START condition (S) bit 7 MSB (A7) bit 6 (A6) bit 0 LSB (R/W) acknowledge (A) STOP condition (P) 1/fSCL tr tVD;DAT tSP Fig 28. Write to output (SC16IS750 and SC16IS760 only) 002aab255 A W SDA A GPIOn DATA A IOSTATE REG. SLAVE ADDRESS A td1 Fig 29. Modem input pin interrupt (SC16IS750 and SC16IS760 only) 002aab256 A W SDA A R IRQ td2 S A DATA A ACK to master SLAVE ADDRESS MSR REGISTER SLAVE ADDRESS A td3 MODEM pin |
Similar Part No. - SC16IS740_11 |
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Similar Description - SC16IS740_11 |
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