SC16IS740_11 datasheet(46/63 Pages) NXP

Part #	SC16IS740

Description	Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs

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Manufacturer	NXP [NXP Semiconductors]

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SC16IS740_750_760

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Product data sheet

Rev. 7 — 9 June 2011

46 of 63

NXP Semiconductors

SC16IS740/750/760

Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR

[1]

5.5 V steady state voltage tolerance on inputs and outputs is valid only when the supply voltage is present. 3.8 V steady state voltage

tolerance on inputs and outputs when no supply voltage is present.

[2]

XTAL2 should be left open when XTAL1 is driven by an external clock.

I2C-bus inputs SCL, CS/A0, SI/A1

VIH

HIGH-level input voltage

1.6

5.5[1]

2.0

5.5[1]

V

VIL

LOW-level input voltage

-

0.6

-

0.8

V

IL

leakage current

input; VI = 0 V or 5.5 V[1]

-10-10

A

Ci

input capacitance

-

7

-

7

pF

Clock input XTAL1[2]

VIH

HIGH-level input voltage

1.8

5.5[1]

2.4

5.5[1]

V

VIL

LOW-level input voltage

-

0.45

-

0.6

V

IL

leakage current

input; VI = 0 V or 5.5 V[1]

30

+30

30

+30

A

Ci

input capacitance

-

3

-

3

pF

Sleep current

IDD(sleep)

sleep mode supply current

inputs are at VDD or ground

-

30

-

30

A

Table 36.

Static characteristics …continued

VDD =2.5 V  0.2 V, Tamb = 40 Cto+85 C; or VDD =3.3 V  0.3 V, Tamb = 40 Cto +95 C; unless otherwise specified.

Symbol

Parameter

Conditions

VDD =2.5 V

VDD =3.3 V

Unit

Min

Max

Min

Max

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