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SC16IS740 Datasheet(PDF) 40 Page - NXP Semiconductors |
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SC16IS740 Datasheet(HTML) 40 Page - NXP Semiconductors |
40 / 63 page SC16IS740_750_760 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 — 9 June 2011 40 of 63 NXP Semiconductors SC16IS740/750/760 Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR Fig 22. I2C-bus data formats 002aab458 DATA SLAVE ADDRESS master write: S W A DATA A A P data transferred (n bytes + acknowledge) START condition STOP condition acknowledge acknowledge acknowledge write DATA SLAVE ADDRESS master read: S R A DATA A NA P data transferred (n bytes + acknowledge) START condition STOP condition acknowledge acknowledge not acknowledge read DATA SLAVE ADDRESS combined formats: S R/W A DATA A A P data transferred (n bytes + acknowledge) START condition STOP condition acknowledge acknowledge acknowledge read or write SLAVE ADDRESS Sr R/W A repeated START condition acknowledge read or write direction of transfer may change at this point data transferred (n bytes + acknowledge) |
Similar Part No. - SC16IS740_11 |
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Similar Description - SC16IS740_11 |
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