SC16IS740_11 datasheet(29/63 Pages) NXP

Part #	SC16IS740

Description	Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs

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Manufacturer	NXP [NXP Semiconductors]

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SC16IS740_750_760

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Product data sheet

Rev. 7 — 9 June 2011

29 of 63

NXP Semiconductors

SC16IS740/750/760

Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR

8.9 Interrupt Enable Register (IER)

The Interrupt Enable Register (IER) enables each of the six types of interrupt, receiver

error, RHR interrupt, THR interrupt, modem status, Xoff received, or CTS/RTS change of

state from LOW to HIGH. The IRQ output signal is activated in response to interrupt

generation. Table 19 shows the Interrupt Enable Register bit settings.

[1]

IER[7:4] can only be modified if EFR[4] is set, that is, EFR[4] is a write enable. Re-enabling IER[1] will not

cause a new interrupt if the THR is below the threshold.

[2]

Only available on the SC16IS750/SC16IS760.

Table 19.

Interrupt Enable Register bits description

Bit

Symbol

Description

7IER[7][1]

CTS interrupt enable

logic 0 = disable the CTS interrupt (normal default condition)

logic 1 = enable the CTS interrupt

6IER[6][1]

RTS interrupt enable

logic 0 = disable the RTS interrupt (normal default condition)

logic 1 = enable the RTS interrupt

5IER[5][1]

Xoff interrupt

logic 0 = disable the Xoff interrupt (normal default condition)

logic 1 = enable the Xoff interrupt

4IER[4][1]

Sleep mode

logic 0 = disable Sleep mode (normal default condition)

logic 1 = enable Sleep mode. See Section 7.6 “Sleep mode” for details.

3

IER[3]

Modem Status Interrupt[2].

logic 0 = disable the modem status register interrupt (normal default

condition)

logic 1 = enable the modem status register interrupt

Remark: See IOControl register bit 1 in Table 30 for the description of how to

program the pins as modem pins.

2

IER[2]

Receive Line Status interrupt

logic 0 = disable the receiver line status interrupt (normal default condition)

logic 1 = enable the receiver line status interrupt

1

IER[1]

Transmit Holding Register interrupt.

logic 0 = disable the THR interrupt (normal default condition)

logic 1 = enable the THR interrupt

0

IER[0]

Receive Holding Register interrupt.

logic 0 = disable the RHR interrupt (normal default condition)

logic 1 = enable the RHR interrupt

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