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SC16IS740 Datasheet(PDF) 16 Page - NXP Semiconductors |
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SC16IS740 Datasheet(HTML) 16 Page - NXP Semiconductors |
16 / 63 page ![]() SC16IS740_750_760 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 — 9 June 2011 16 of 63 NXP Semiconductors SC16IS740/750/760 Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR 7.5.1 Interrupt mode operation In Interrupt mode (if any bit of IER[3:0] is 1) the host is informed of the status of the receiver and transmitter by an interrupt signal, IRQ. Therefore, it is not necessary to continuously poll the Line Status Register (LSR) to see if any interrupt needs to be serviced. Figure 13 shows Interrupt mode operation. 7.5.2 Polled mode operation In Polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be checked by polling the Line Status Register (LSR). This mode is an alternative to the FIFO Interrupt mode of operation where the status of the receiver and transmitter is automatically known by means of interrupts sent to the CPU. Figure 14 shows FIFO Polled mode operation. Fig 13. Interrupt mode operation 11 11 IIR IER THR RHR HOST IRQ 002aab042 read IIR Fig 14. FIFO Polled mode operation 00 00 LSR IER THR RHR HOST read LSR 002aab043 |
Similar Part No. - SC16IS740_11 |
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Similar Description - SC16IS740_11 |
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