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ICE3PCS03G Datasheet(PDF) 12 Page - Infineon Technologies AG

Part # ICE3PCS03G
Description  Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM)
PDF  20 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

ICE3PCS03G Datasheet(HTML) 12 Page - Infineon Technologies AG

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CCM-PFC
ICE3PCS03G
Functional Description
Version 2.0
12
5 May 2010
Figure 12
Input Brownout Protection
3.8.2
Peak Current Limit (PCL)
The IC provides a cycle by cycle peak current limitation
(PCL). It is active when the voltage at pin 1 (ISENSE)
reaches -0.4V. This voltage is amplified by a factor of -
2.5 and connected to comparator with a reference
voltage of 1.0V as shown in Figure 13. A deglitcher with
200ns after the comparator improves noise immunity to
the activation of this protection.
Figure 13 Peak Current Limit (PCL)
3.8.3
Open Loop Protection (OLP)
Whenever VSENSE voltage falls below 0.5V, or
equivalently VOUT falls below 20% of its rated value, it
indicates an open loop condition (i.e. VSENSE pin not
connected) or an insufficient input voltage VIN for
normal operation. It is implemented using comparator
C2a with a threshold of 0.5V as shown in the IC block
diagram in Figure 6.
3.8.4
First Over-Voltage Protection (OVP)
Whenever VOUT exceeds the rated value by 8%, the
over-voltage protection OVP1 is active as shown in
Figure 6. This is implemented by sensing the voltage at
VSENSE pin with respect to a reference voltage of
2.7V. A VSENSE voltage higher than 2.7V will
immediately turn off the gate, thereby preventing
damage to bus capacitor. After bulk voltage falls below
the rated value, gate drive resumes switching again.
3.9
Output Gate Driver
The output gate driver is a fast totem pole gate drive. It
has an in-built cross conduction currents protection and
a Zener diode Z1 (see Figure 14) to protect the external
transistor switch against undesirable over voltages.
The maximum voltage at pin 8 (GATE) is typically
clamped at 15V.
The output is active HIGH and at VCC voltages below
the under voltage lockout threshold VCCUVLO, the gate
drive is internally pull low to maintain the off state.
Figure 14 Gate Driver
Line
Filter
DBRO1
DBRO2
RBRO1
RBRO2
RBRO3
90 ~ 270 Vac
CBRO
BOP
C8b
C8a
R
S
Q
Q
Brownout
Latch
1.25V
1V
Brownout
Rshunt
RCS
Full-wave
rectifier
ISENSE
AO2
C5
200ns
SGND
G=-2.5
1V
Iin
PCL
External
MOS
GATE
Z1
VCC
Gate Driver
PWM Logic
HIGH to
turn on
LV
* LV: Level Shift
Reg (17V)


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