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CY2CP1504 Datasheet(PDF) 5 Page - Cypress Semiconductor

Part # CY2CP1504
Description  1:4 LVCMOS to LVPECL Fanout Buffer with Selectable Clock Input
Download  13 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2CP1504 Datasheet(HTML) 5 Page - Cypress Semiconductor

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CY2CP1504
Document Number: 001-56313 Rev. *F
Page 5 of 13
DC Electrical Specifications
(VDD = 3.3 V ± 5% or 2.5 V ± 5%; TA = 0 °C to 70 °C (Commercial) or –40 °C to 85 °C (Industrial))
Parameter
Description
Condition
Min
Max
Unit
IDD
Operating supply current
All LVPECL outputs floating (internal IDD)–
61
mA
VIH1
Input high voltage, All inputs
VDD = 3.3 V
2.0
VDD + 0.3
V
VIL1
Input low voltage, All inputs
VDD = 3.3 V
–0.3
0.8
V
VIH2
Input high voltage, All inputs
VDD = 2.5 V
1.7
VDD + 0.3
V
VIL2
Input low voltage, All inputs
VDD = 2.5 V
–0.3
0.7
V
IIH
Input high current, All inputs
Input = VDD
[3]
150
μA
IIL
Input low current, All inputs
Input = VSS
[3]
–150
μA
VOH
LVPECL output high voltage
Terminated with 50
Ω to V
DD – 2.0
[4]
VDD – 1.20 VDD – 0.70
V
VOL
LVPECL output low voltage
Terminated with 50
Ω to V
DD – 2.0
[4]
VDD – 2.0 VDD – 1.63
V
RP
Internal pull-up/pull-down resistance
CLK_EN has pull-up only
IN_SEL has pull-down only
60
140
k
Ω
CIN
Input capacitance
Measured at 10 MHz; per pin
3
pF
Notes
3. Positive current flows into the input pin, negative current flows out of the input pin.
4. Refer to Figure 2 on page 7.
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