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313079-001 Datasheet(PDF) 30 Page - Intel Corporation |
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313079-001 Datasheet(HTML) 30 Page - Intel Corporation |
30 / 104 page ![]() Electrical Specifications 30 Dual-Core Intel® Xeon® Processor 5000 Series Datasheet 3. Refer to Table 2-11 for processor VCC information. 4. The load lines specify voltage limits at the die measured at the VCC_DIE_SENSE and VSS_DIE_SENSE lands and at the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Voltage regulation feedback for voltage regulator circuits must also be taken from processor VCC_DIE_SENSE and VSS_DIE_SENSE lands and VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Please refer to the appropriate platform design guide for details on VR implementation. Notes: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. These parameters are based on design characterization and are not tested. 3. IOL is measured at 0.10*VTT, IOH is measured at 0.90*VTT. 4. Please refer to the appropriate platform design guide for implementation details. Notes: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. VIL is defined as the voltage range at a receiving agent that will be interpreted as an electrical low value. 3. VIH is defined as the voltage range at a receiving agent that will be interpreted as an electrical high value. 4. VIH and VOH may experience excursions above VTT. However, input signal drivers must comply with the signal quality specifications in Section 3. 5. Leakage to VSS with land held at VTT. 6. Leakage to VTT with land held at 300 mV. 7. This parameter is based on design characterization and is not tested Table 2-12. BSEL[2:0], VID[5:0] Signal Group DC Specifications Symbol Parameter Min Max Units Notes1 RON BSEL[2:0], VID[5:0] Buffer On Resistance N/A 120 Ω 2 IOL Output Low Current N/A 2.4 mA 2, 3 IOH Output High Current N/A 460 µA 2, 3 VTOL Voltage Tolerance 0.95 * VTT 1.05 * VTT V4 Table 2-13. AGTL+ Signal Group DC Specifications Symbol Parameter Min Max Unit Notes1 VIL Input Low Voltage 0.0 GTLREF - (0.10 * VTT)V 2 VIH Input High Voltage GTLREF + (0.10 * VTT)VTT V3, 4 VOH Output High Voltage 0.90 * VTT VTT V4 IOL Output Low Current N/A VTT / (0.50 * RTT_MIN + RON_MIN) mA 4 ILI Input Leakage Current N/A ± 200 µA 5, 6 ILO Output Leakage Current N/A ± 200 µA 5, 6 RON Buffer On Resistance 7 11 Ω 7 Table 2-14. PWRGOOD Input and TAP Signal Group DC Specifications (Sheet 1 of 2) Symbol Parameter Min Max Unit Notes 1, 2 VHYS Input Hysteresis 120 396 mV 3 Vt+ PWRGOOD Input Low to High Threshold Voltage 0.5 * (VTT + VHYS_MIN + 0.24) 0.5 * (VTT + VHYS_MAX + 0.24) V TAP Input Low to High Threshold Voltage 0.5 * (VTT + VHYS_MIN)0.5 * (VTT + VHYS_MAX)V Vt- PWRGOOD Input High to Low Threshold Voltage 0.4 * VTT 0.6 * VTT V TAP Input High to Low Threshold Voltage 0.5 * (VTT -VHYS_MAX)0.5 * (VTT - VHYS_MIN)V VOH Output High Voltage N/A VTT V4 |
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