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MB90800 Datasheet(PDF) 44 Page - Fujitsu Component Limited. |
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MB90800 Datasheet(HTML) 44 Page - Fujitsu Component Limited. |
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44 / 92 page  MB90800 Series 44 DS07-13733-6E (1) 16-bit free-run timer The 16-bit free-run timer consists of a 16-bit up-down counter and control status register. Counter value of 16-bit free-run timer is available as base timer for input capture and output compare. • Clock for the counter operation can be selected from eight types. • The counter overflow interruption can be generated. • Setting the mode enables initialization of the counter through compare-match operation with the value of the compare clear register in the output compare and that of the free-run timer counter. • Register list Compare clear register (CPCLR) Timer counter data register (TCDT) Timer counter control/status register (TCCS) - : Unused bit Initial Value 00003BH XXXXXXXXB Read/Write bit Initial Value 00003AH XXXXXXXXB Read/Write bit Initial Value 00003DH 00000000B Read/Write bit Initial Value 00003CH 00000000B Read/Write bit Initial Value 00003FH 0--00000B Read/Write bit Initial Value 00003EH 00000000B Read/Write 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W R/W R/W CL14 CL15 CL13 CL12 CL11 CL10 CL09 CL08 76 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W CL06 CL07 CL05 CL04 CL03 CL02 CL01 CL00 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W R/W R/W T14 T15 T13 T12 T11 T10 T09 T08 76 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W T06 T07 T05 T04 T03 T02 T01 T00 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W ⎯ ECKE ⎯ ⎯⎯ MSI2 MSI1 MSI0 ICLR ICRE 76 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W IVFE IVF STOP MODE SCLR CLK2 CLK1 CLK0 |
Similar Part No. - MB90800_09 |
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Similar Description - MB90800_09 |
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