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MB90800 Datasheet(PDF) 37 Page - Fujitsu Component Limited. |
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MB90800 Datasheet(HTML) 37 Page - Fujitsu Component Limited. |
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37 / 92 page  MB90800 Series DS07-13733-6E 37 6. 16 bits PPG The PPG timer consists of the following: •Prescaler • 16-bit down-counter: 1 • 16-bit data register with a cycle setting buffer • 16-bit compare register with a duty setting buffer • Pin control unit The PPG timer can output pulses synchronized to the software trigger. The output pulse can be changed to any cycle and duty freely by updating the PCSRL, PCSRH/PDUTL, PDUTH registers. • PWM function The PPG timer can output pulses programmably by updating the PCSR and PDUT registers described above in synchronization to the trigger. Can also be used as a D/A converter by an external circuit. • Single shot function By detecting an edge of the trigger input, a single pulse can be output. • 16-bit down counter The counter operation clock comes from eight kinds optional. There are eight kinds of internal clocks. ( φ, φ2, φ4, φ8, φ16, φ32, φ64, φ128) φ : machine clock The counter can be initialized to “FFFFH” at a reset or counter borrow. • Interrupt request The PPG timer generates an interrupt request when : • Timer start-up • Counter borrow occurrence (cycle match) • Duty match occurrence |
Similar Part No. - MB90800_09 |
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Similar Description - MB90800_09 |
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